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*
* Copyright (C) 2010 - 2014 Xilinx, Inc.  All rights reserved.
*
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* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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/*****************************************************************************/
/**
*
* @file xil_cache_l.h
*
* Contains L1 and L2 specific functions for the ARM cache functionality
* used by xcache.c. This functionality is being made available here for
* more sophisticated users.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver   Who  Date     Changes
* ----- ---- -------- -----------------------------------------------
* 1.00a ecm  01/24/10 First release
* </pre>
*
******************************************************************************/
#ifndef XIL_CACHE_MACH_H
#define XIL_CACHE_MACH_H

#ifdef __cplusplus
extern "C" {
#endif

/************************** Function Prototypes ******************************/

void Xil_DCacheInvalidateLine(unsigned int adr);
void Xil_DCacheFlushLine(unsigned int adr);
void Xil_DCacheStoreLine(unsigned int adr);
void Xil_ICacheInvalidateLine(unsigned int adr);

void Xil_L1DCacheEnable(void);
void Xil_L1DCacheDisable(void);
void Xil_L1DCacheInvalidate(void);
void Xil_L1DCacheInvalidateLine(unsigned int adr);
void Xil_L1DCacheInvalidateRange(unsigned int adr, unsigned len);
void Xil_L1DCacheFlush(void);
void Xil_L1DCacheFlushLine(unsigned int adr);
void Xil_L1DCacheFlushRange(unsigned int adr, unsigned len);
void Xil_L1DCacheStoreLine(unsigned int adr);

void Xil_L1ICacheEnable(void);
void Xil_L1ICacheDisable(void);
void Xil_L1ICacheInvalidate(void);
void Xil_L1ICacheInvalidateLine(unsigned int adr);
void Xil_L1ICacheInvalidateRange(unsigned int adr, unsigned len);

void Xil_L2CacheEnable(void);
void Xil_L2CacheDisable(void);
void Xil_L2CacheInvalidate(void);
void Xil_L2CacheInvalidateLine(unsigned int adr);
void Xil_L2CacheInvalidateRange(unsigned int adr, unsigned len);
void Xil_L2CacheFlush(void);
void Xil_L2CacheFlushLine(unsigned int adr);
void Xil_L2CacheFlushRange(unsigned int adr, unsigned len);
void Xil_L2CacheStoreLine(unsigned int adr);

#ifdef __cplusplus
}
#endif

#endif
